Department of Mechanical Engineering Faculty of Applied Sciences Vrije Universiteit Brussel
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Old design : sixteen bit parallel data bus.

The key element for communication is the use of 16 bit dual ported RAM units (see picture above) which are the transfer and buffer agents between the PC and each microcontroller. In total there are seven such units. Each unit has an address bus and data bus for the microcontroller on one side and an address bus and data bus for the PC on the other. This allows 16 bit parallel data transfer.

Two strategies were developed to enhance data transfer rates. Firstly, the memory space was divided into two parts. One part reads for the microcontroller and writes for the PC and the other part does the opposite. This allows simultaneous data transfer of microcontroller and PC to the dual ported RAM unit. To achieve this separation the R/W signals are connected on the highest address pin of the RAM unit but with a negation at the controller side. Secondly, a PC card (see picture below) was designed which enables the PC to validate only once an output address in order to scan all seven RAM units over the several data per unit. This is achieved with the use of counters both for incrementing the RAM unit number and the addresses within each unit. The seventh microcontroller or master controls the whole data transfer by handling bus control bits.

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Last update: Oct 24 2017 - 19:10:31
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Vrije Unversiteit Brussel,    Faculty of Applied Sciences,     Department of Mechanical Engineering
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